Asilomar Conference on Signals, Systems and Computers

Maitane Barrenechea, lecturer and researcher at the Signal Theory and Communications group of the University of Mondragon has participated in the 46^th annual Asilomar Conference on Signals, Systems and Computers held at Pacific Grove (California) on the first week of November.

The Asilomar conference provides a forum for presenting work in various areas of theoretical and applied signal processing, such as MIMO communications, biomedical signal and image processing and other signal processing approaches focused on speech, image and video processing.

The presented work, which has been developed in collaboration with Prof. Andreas Burg from the Telecommunications Circuits Laboratory of the École Polytechnique Fédérale de Lausanne (EPFL), has focused on the implementation ofa low-complexity and high-performance vector precoder for Multiuser and Multiantena (MIMO) communications. The title, author list and the abstract of the presented work are the following:

Low-Complexity Vector Precoding for Multi-user Systems

Maitane Barrenechea, Andreas Burg, and Mikel Mendicute.

Abstract: Vector precoding enables non-cooperative signal acquisition in the multi-user broadcast channel. The performance advantage with respect to the more straightforward linear precoding algorithms comes as a consequence of an added perturbation vector, which enhances the properties of the precoded signal. Nevertheless, the computation of the perturbation signal entails a search for the closest point in an infinite lattice, which is known to belong in the class of non-deterministic polynomial time hard (NP-hard) problems. This contribution presents a novel tree search scheme that achieves an error-rate performance that is close to the optimum given by the sphere encoder, but with a significantly simpler tree-search structure that only considers the most promising nodes for expansion. With the aim of better showcasing the low-complexity and simple datapath of the proposed tree-search technique, its hardware implementation on a 65 nm ASIC target device has been performed.

If you want to learn more about the research work carried out by our group go to our website: Signal Theory and Communications group.